EDN

Models for high-voltage transistors in a standard CMOS process

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...
EDN

Power management can cause latchup in CMOS chips

If you leave signals applied to the inputs of a CMOS chip with the power turned off, the chip might explode when you re-apply power. This is called latchup. Similarly, if you drag the outputs of a ...
Nanowerk

Engineers generate world-record mm wave output power from nanoscale CMOS

(Nanowerk News) Harish Krishnaswamy, assistant professor of electrical engineering at Columbia Engineering, has generated a record amount of power output—by a power of five—using silicon-based ...
NextBigFuture

Room-temperature Valleytronic Transistors Could be the Next Thing After CMOS

Valleytronics, based on the valley degree of freedom rather than charge, is a promising candidate for next-generation information devices beyond complementary metal–oxide–semiconductor (CMOS) ...
AZoNano

Direct-Write Fabrication of 1D Transistors and Non-CMOS Logic Gates: A Stimulus for Nanoelectronics to Mature

The transistor, an invention that heralded a new era in electronics, is the key component of practically all integrated circuits (ICs) and microprocessors. The point-contact transistor that Walter H.
Electronics Weekly

Nanotube CMOS transistors could hit THz

IBM has revealed more details of its 52MHz nanotube-based CMOS ring oscillator, and claims versions running at terahertz frequencies are feasible. All of the p and n-Mosfets in the five-stage ...