The SAF1760 is a Hi-Speed Universal Serial Bus (USB) host controller with a generic processor interface. It integrates one Enhanced Host Controller Interface (EHCI), one Transaction Translator (TT) ...

The offload of tasks for data plane packet-processing elements, such as network processors, to co-processor solutions, such as classification engines, ternary CAMs (TCAMs), IP co-processors, and more ...

XDR(tm) DRAM and Redwood FlexIO(tm) processor bus provide unprecedented bandwidth for next-generation computer and consumer applications SAN FRANCISCO, CA - February 7, 2005 - Rambus Inc. (Nasdaq:RMBS ...

The newest processor in Texas Instruments' OMAP family integrates Standard Microsystems Corporation's (SMSC) MediaLB communication bus for interfacing to media-oriented system transport (MOST) ...

Atlantic is a point-to-point interface protocol for IP cores, to make it easy to assemble System On A Programmable chip (SOPC) designs. It is primarily intended for high performance data path designs, ...

The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced the release of MIPI I3C Basic v1.2, a scalable ...

Although the ability to expand a home computer with more RAM, storage and other features has been around for as long as home computers exist, it wasn’t until the IBM PC that the concept of a fully ...

UVM testbenches for blocks are adequate until the stage of a subsystem with one or more processors. The new generation of constrained-random test cases based on scenario models can take it from there.

eFPGA is available now on mainstream process nodes (40, 28 and 16), in sizes from 200 LUTs to 200K LUTs and with options for DSP and RAM integration to fit almost any customer need. Flex Logix has ...

The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, announced the release of MIPI I3C Basic v1.2, a scalable utility ...